Modern radio frequency (RF) CMOS designers are facing new integration and characterization paradigms due to the coexistence of traditional analog RF wireless designs with digital base-band signal processors and power management on the same physical die. While deep-submicron CMOS processes present new integration opportunities on one hand, they make it extremely difficult to implement high fidelity traditional analog circuits, on the other. The latest CMOS technology parameters are optimized for low cost digital designs only. This forces the analog and mixed-signal designers, using these technologies, to make multi-dimensional trade-offs. The conflicting requirements of area, power and performance in the modern wireless cellular handsets force the designer to intelligently budget parameters such as noise, linearity, gain, supply voltage, signal headroom, impedance, power leakage and dissipation. The inability of SPICE models and other simulators to model the complete RF operational environment mandates several expensive design and fabrication iterations before arriving at a production worthy solution. Although device modeling has recently benefited greatly from the advances in the computational modeling techniques, rapid scaling of technology as well as architectural requirements and device-level innovations appear to hamper the modeling accuracy faster.
Historically, analog circuits have lagged in production ramping behind digital circuitry by more than one CMOS generation, failing to utilize the full potential of new processes or to comply with the new supply-voltage scaling. The quandary of poor characterization leads to substantial conservatism in initial analog designs. This leads to expensive cost of design iterations, thus resulting in circuits that do not exploit the raw speed of the latest technology. For example, precise frequency tuning of a low-voltage deep-submicron CMOS digitally-controlled oscillator is an extremely challenging task due to its highly nonlinear frequency versus voltage characteristics. Low-voltage headroom also makes it susceptible to the substrate and the power/ground supply noise. Furthermore, it is extremely difficult to guarantee correct output DCO frequency and tuning step without accurate data on the constituent tuning devices, parasitics and device variation across process, voltage and temperature.
Sometimes, the task is further complicated by the difficulty in even making reliable laboratory measurements due to the accuracy issues caused by probing noise, minuscule device sizing, dynamic effects and loading. Some key device characteristics of the DCO, for example, capacitor mismatch, thermal and flicker (1/f) noise contributions are quite difficult to measure accurately. For small capacitors used in most analog circuits, generally in the range of 0.1-1 picofarads, direct measurement would possess many uncertainties resulting from parasitics in the physical test setup. Varactors built in CMOS technology are even smaller, typically in the attofarad to femtofarad range. These varactors also suffer from a relatively low quality factor and exhibit substantial series resistance due to the n-well material. All these attributes render the characterization of varactors extremely difficult.
Further, good quality control of CMOS fabrication is a prerequisite to the mass production of wireless standard specification-compliant transmitters. The amount of mismatch, in the smallest sized DCO bank varactors used for frequency command tracking, is critical to the performance of ADPLL based transceivers due to its direct impact on the spectral purity of the DCO and hence the transceiver built using it.
While digital polar modulated transmitters have been demonstrated for GGE (GSM,GPRS and EDGE), their usage for 3G remains a daunting task. Polar modulation relies on splitting the digital I/Q baseband input signal into a phase (or its time derivative, frequency) and an amplitude data streams. The differentiated phase signal (f=Δθ/Δt) is used to directly modulate a digitally controlled oscillator (DCO), the output of which is combined with the amplitude signal (p) in a digital pre-power amplifier (PPA) or digitally-controlled power amplifier (DPA). The f=Δθ/Δt component generated when passing, e.g., the 3.84 MHz WCDMA I/Q signal through a CORDIC transformation algorithm spreads significantly due to the non linear (arctan) operation. It is no longer band-limited and theoretically infinite modulation of the oscillator is needed to represent this phase signal. Although in a discrete time system, the maximum frequency deviation will be limited to the sampling rate, it is still in the order of tens of megahertz as shown in FIG. 1 for the CORDIC operating at 60 MHz. Given that the DCO can operate at four times the channel frequency, the required modulation is four times that shown in FIG. 1. Any truncation in phase data will degrade Error Vector Magnitude (EVM) and produces spectral regrowth.
Tight modulation resolution has to be maintained in order to keep the frequency quantization noise much lower than electronic or thermal DCO phase noise. In order to satisfy the close-in spectral mask as well as the requisite phase error (or EVM) performance for the GSM/EDGE/WCDMA polar transmitters, any degradation due to the INL and DNL in the DCO has to be avoided.
It is further desirable to have characterization methodologies, which do not penalize the device area budget, do not consume extensive testing time and can be easily ported into the next generations of the CMOS processes with minimal adjustments. Specifically, there is a need for a varactor characterization technique to estimate the mismatches in the tracking bank (i.e., unified bank) tuning varactors of an RF DCO. The DCO being a vital component of the digital radio frequency processor (DRP) technology at the heart of modern GSM/EDGE/UMTS RF transceiver designs.
Once the characterization and calibration of such device mismatches is understood, development of digital circuits that allow for the compensation of such inter-device ratio, random and possibly systematic mismatches is a must.